The transition to Software-Defined Vehicles (SDVs) goes beyond ECU consolidation. It represents a shift toward redesigning the entire vehicle architecture around software—from the cockpit and ADAS to body, chassis, and the operating systems running on safety-critical MCUs. This requires a software foundation that enables diverse operating systems and workloads to coexist safely on shared hardware.

This session explores the significance of hardware–software decoupling across high-performance AI computing and safety-critical MCUs. It examines how virtualization supports functional safety, cybersecurity, and real-time performance, allowing rapidly evolving AI software to coexist with safety-critical control functions whose validated behavior and timing must be preserved.

The session reviews multidomain integration trends in platforms such as NVIDIA Thor and Renesas R-Car X5H, alongside the role of Android Automotive and VirtIO in reducing hardware dependencies. It then introduces PEGASUS, an ISO 26262 ASIL-D certified Type-1 hypervisor supporting both CPUs and MCUs, with capabilities for resource partitioning, isolation, fallback, and availability. It also outlines the security access controls provided by AEGIS and the complementary role of the GAIA secure bootloader, including its ASIL-D certification and Automotive SPICE® v4.0 Capability Level 2 achievement for its development processes.

The main practical example is an Infineon AURIX™ TC4Dx-based demonstration running AUTOSAR Classic as a guest VM on PEGASUS. It illustrates how existing automotive software can be incorporated into a virtualized MCU architecture, extending the SDV approach toward body and chassis control. A complementary NVIDIA Thor-based multi-OS demonstration illustrates virtualization on a high-performance AI computing platform. The session concludes with supported platforms and evaluation options, including a free PEGASUS evaluation for Infineon AURIX™ TC4x, to help teams begin validating their architecture on real hardware.

Designed for OEM, Tier 1, and Tier 2 engineers and technology planning professionals working on automotive software and E/E architectures, this session provides design perspectives for safely integrating diverse software and reducing hardware dependencies.